Build Report

Generated: Fri Jun 18 19:50:43 2021 by LibreSilicon Standard Cell Library Generator

Input files: PDK, DRC, layer definitions, process parameters:

These input files are necessary to define the rules and parameters for the standard cell library. All those files are collected in the Tech directory.

Filename	Description
X	DRC rules for KLayout GDS Viewer
√librecell_tech.py	Cell layouting rules, DRC
√libresilicon.m	Transistor BSIM model SPICE parameters (*.lib files in other tools)
√libresilicon.tech	Magic Layers and Parasitic extraction parameters
√template.lef	Template for the header of Library Exchange Format LEF Files
X	Transistor size template for SPICE models

Standard Cells:

These are the generated standard cells. You can click on the green ticks and the error messages to get more details or download the files. By moving the mouse over the header line you will get explanations for each column.

Cell	cell	Magic	Layout	Schematic	Log	Err	DRC	Liberty	LEF	GDS	SPICE	Parasitic	Area	LVS	LayoutTime	Ports	Iterat.	Errors
AND2X1.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	219456	SUCCESS	0:00:05	5	1
AND2X2.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	219456	SUCCESS	0:00:05	5	1
AOI21X1.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	219456	SUCCESS	0:00:05	6	1
AOI22X1.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	274320	SUCCESS	0:00:07	7	1
BUFX2.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	164592	SUCCESS	0:00:03	4	1
BUFX4.cell	√	√	√	X	√	√	√ 9	√	√	√	√	√	219456	SUCCESS	0:00:05	4	1
CLKBUF1.cell	√	√	√	X	√	√	√ 18	√	√	√	√	√	493776	SUCCESS	0:00:16	4	1
CLKBUF2.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
CLKBUF3.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
DFFNEGX1.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
DFFPOSX1.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
DFFSR.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
FAX1.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
HAX1.cell	√	√	√	X	√	√	√ 0	X	√	√	√	√		SUCCESS	0:00:20	0	2
INV.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	109728	SUCCESS	0:00:02	4	0
INVX1.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	109728	SUCCESS	0:00:02	4	0
INVX2.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	109728	SUCCESS	0:00:02	4	0
INVX4.cell	√	√	√	X	√	√	√ 0	√	√	√	√	√	164592	SUCCESS	0:00:03	4	0
INVX8.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	274320	SUCCESS	0:00:07	4	1
LATCH.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
LOFTY.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
LOFTY2.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
MUX2X1.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	329184	SUCCESS	0:00:08	6	1
NAND2X1.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	164592	SUCCESS	0:00:03	5	0
NAND3X1.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	219456	SUCCESS	0:00:05	6	0
NOR2X1.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	164592	SUCCESS	0:00:03	5	1
NOR3X1.cell	√	√	√	X	√	√	√ 15	√	√	X	√	√	1977195	SUCCESS	0:00:10	6	1
OAI21X1.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	219456	SUCCESS	0:00:05	6	1
OAI22X1.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	274320	SUCCESS	0:00:07	7	4
OR2X1.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	219456	SUCCESS	0:00:05	5	1
OR2X2.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	219456	SUCCESS	0:00:05	5	1
PADINC.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
PADINOUT.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
PADOUT.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
TBUFX1.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
TBUFX2.cell	√	X	X	X	√	√	X	X	X	X	X	X				0		This cell has been excluded from building
XNOR2X1.cell	√	√	√	X	√	√	√ 50	√	√	√	√	√	384048	SUCCESS	0:00:10	5	2
XOR2X1.cell	√	√	√	X	√	√	√ 0	√	√	X	√	√	384048	SUCCESS	0:00:11	5	2

Output files (needed by RTL2GDS tools like qflow, OpenROAD, Cadence, Synopsys, ...):

These are the resulting output files, you can download and use them with other EDA tools to build your chips:

Filename	Description
√ ../Documents/StdCellLib.pdf	PDF Documentation of the Standard cell library
√ demoboard.mag	Demoboard: with all cells
√ library.gds	GDS-II file with masks for all cells, can be viewed with KLayout
√ libresilicon.lef	Library Exchange Format (LEF) File with all cells
√ libresilicon.lib	LIBERTY File with Characterization of all cells, can be viewed with libertyviz
√ libresilicon.sp	SPICE netlist with all cells

If you want to build your own standard cell library, you can try our Online Standard Cell Library Generator or download the generator software and run it yourself.