Filename | Description |
---|---|
X | DRC rules for KLayout GDS Viewer |
√librecell_tech.py | Cell layouting rules, DRC |
√libresilicon.m | Transistor BSIM model SPICE parameters (*.lib files in other tools) |
√libresilicon.tech | Magic Layers and Parasitic extraction parameters |
√nmos.sp | Transistor size template for SPICE models |
√pmos.sp | Transistor size template for SPICE models |
√template.lef | Template for the header of Library Exchange Format LEF Files |
Cell | cell | Magic | Layout | Schematic | Log | Err | DRC | Liberty | LEF | GDS | SPICE | Parasitic | Area | LVS | Euler | LayoutTime | Nets | Ports | Iterat. | Errors |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
AOI21.cell | √ | √ | √ | √ | √ | √ | √ 34 | √ | √ | √ | √ | √ | 6504894 | 2 | 0:00:04 | 5 | 0 | |||
ASYNC1.cell | √ | √ | √ | √ | √ | √ | √ 51 | X | √ | √ | √ | √ | 0:00:53 | 0 | 11 | |||||
ASYNC2.cell | √ | √ | √ | √ | √ | √ | √ 51 | X | √ | √ | √ | √ | 0:00:11 | 0 | 1 | |||||
ASYNC3.cell | √ | √ | √ | √ | √ | √ | √ 118 | X | √ | √ | √ | √ | 0:00:32 | 0 | 3 | |||||
INV.cell | √ | √ | √ | √ | √ | √ | √ 34 | √ | √ | √ | √ | √ | 6504894 | 2 | 0:00:02 | 4 | 0 | |||
MARTIN1989.cell | √ | √ | √ | √ | √ | √ | √ 0 | X | √ | √ | √ | √ | 0:00:12 | 5 | 1 | |||||
sutherland1989.cell | √ | √ | √ | √ | √ | √ | √ 0 | X | √ | √ | √ | √ | 0:00:39 | 0 | 5 | |||||
vanberkel1991.cell | √ | √ | √ | √ | √ | √ | √ 0 | X | √ | √ | √ | √ | 0:00:33 | 5 | 1 |
Filename | Description |
---|---|
√ ../Documents/StdCellLib.pdf | PDF Documentation of the Standard cell library |
√ demoboard.mag | Demoboard: with all cells |
√ library.gds | GDS-II file with masks for all cells, can be viewed with KLayout |
√ libresilicon.lef | Library Exchange Format (LEF) File with all cells |
√ libresilicon.lib | LIBERTY File with Characterization of all cells, can be viewed with libertyviz |
√ libresilicon.sp | SPICE netlist with all cells |