Filename | Description |
---|---|
X | DRC rules for KLayout GDS Viewer |
√librecell_tech.py | Cell layouting rules, DRC |
√libresilicon.m | Transistor BSIM model SPICE parameters (*.lib files in other tools) |
√libresilicon.tech | Magic Layers and Parasitic extraction parameters |
√nmos.sp | Transistor size template for SPICE models |
√pmos.sp | Transistor size template for SPICE models |
√template.lef | Template for the header of Library Exchange Format LEF Files |
Cell | cell | Magic | Layout | Schematic | Log | Err | DRC | Liberty | LEF | GDS | SPICE | Parasitic | Area | LVS | Euler | LayoutTime | Nets | Ports | Iterat. | Errors |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
AND2X1.cell | √ | √ | √ | X | √ | √ | √ 32 | √ | √ | √ | √ | √ | 877824 | FAILED | 0:00:14 | 5 | 1 | |||
AND2X2.cell | √ | √ | √ | X | √ | √ | √ 32 | √ | √ | √ | √ | √ | 6370576 | FAILED | 0:00:12 | 5 | 0 | |||
AOI21X1.cell | √ | √ | √ | X | √ | √ | √ 47 | √ | √ | √ | √ | √ | 8135550 | FAILED | 0:00:14 | 6 | 1 | |||
AOI22X1.cell | √ | √ | √ | X | √ | √ | √ 23 | √ | √ | √ | √ | √ | 1097280 | FAILED | 0:00:21 | 7 | 1 | |||
ASYNC1.cell | √ | √ | √ | X | √ | √ | √ 71 | X | √ | √ | √ | √ | FAILED | 0:01:10 | 0 | 8 | ||||
ASYNC2.cell | √ | √ | √ | X | √ | √ | √ 32 | X | √ | √ | √ | √ | FAILED | 0:00:20 | 0 | 1 | ||||
ASYNC3.cell | √ | √ | √ | X | √ | √ | √ 101 | X | √ | √ | √ | √ | FAILED | 0:01:41 | 0 | 10 | ||||
BUFX2.cell | √ | √ | √ | X | √ | √ | √ 16 | √ | √ | √ | √ | √ | 6370576 | FAILED | 0:00:08 | 4 | 1 | |||
BUFX4.cell | √ | √ | √ | X | √ | √ | √ 16 | √ | √ | √ | √ | √ | 6370576 | FAILED | 0:00:13 | 4 | 1 | |||
CLKBUF1.cell | √ | √ | √ | X | √ | √ | √ 64 | √ | √ | √ | √ | √ | 1975104 | FAILED | 0:00:45 | 4 | 1 | |||
CLKBUF2.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
CLKBUF3.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
DFFNEGX1.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
DFFPOSX1.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
DFFSR.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
FAX1.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
HAX1.cell | √ | √ | √ | X | √ | √ | √ 70 | X | √ | √ | √ | √ | FAILED | 0:01:11 | 0 | 2 | ||||
INV.cell | √ | √ | √ | X | √ | √ | √ 0 | √ | √ | √ | √ | √ | 438912 | FAILED | 0:00:04 | 4 | 0 | |||
INVX1.cell | √ | √ | √ | X | √ | √ | √ 0 | √ | √ | √ | √ | √ | 438912 | FAILED | 0:00:04 | 4 | 0 | |||
INVX2.cell | √ | √ | √ | X | √ | √ | √ 0 | √ | √ | √ | √ | √ | 438912 | FAILED | 0:00:04 | 4 | 0 | |||
INVX4.cell | √ | √ | √ | X | √ | √ | √ 32 | √ | √ | √ | √ | √ | 6489714 | FAILED | 0:00:08 | 4 | 1 | |||
INVX8.cell | √ | √ | √ | X | √ | √ | √ 48 | √ | √ | √ | √ | √ | 6370576 | FAILED | 0:00:20 | 4 | 1 | |||
LATCH.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
LOFTY.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
LOFTY2.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
martin1989.cell | √ | X | X | X | √ | √ | X | X | X | X | √ | X | 0 | 1 | Expected to get exactly one top level circuit. Expected to get exactly one top level circuit. This cell is currently building... | |||||
MUX2X1.cell | √ | √ | √ | X | √ | √ | √ 44 | √ | √ | √ | √ | √ | 1316736 | FAILED | 0:00:26 | 6 | 1 | |||
NAND2X1.cell | √ | √ | √ | X | √ | √ | √ 8 | √ | √ | √ | √ | √ | 6370576 | FAILED | 0:00:08 | 5 | 0 | |||
NAND3X1.cell | √ | √ | √ | X | √ | √ | √ 8 | √ | √ | √ | √ | √ | 6370576 | FAILED | 0:00:12 | 6 | 0 | |||
NOR2X1.cell | √ | √ | √ | X | √ | √ | √ 24 | √ | √ | √ | √ | √ | 658368 | FAILED | 0:00:08 | 5 | 1 | |||
NOR3X1.cell | √ | √ | √ | X | √ | √ | √ 80 | √ | √ | √ | √ | √ | 1536192 | FAILED | 0:00:39 | 6 | 3 | |||
OAI21X1.cell | √ | √ | √ | X | √ | √ | √ 31 | √ | √ | √ | √ | √ | 877824 | FAILED | 0:00:14 | 6 | 1 | |||
OAI22X1.cell | √ | √ | √ | X | √ | √ | √ 55 | √ | √ | √ | √ | √ | 11048745 | FAILED | 0:00:33 | 7 | 5 | |||
OR2X1.cell | √ | √ | √ | X | √ | √ | √ 32 | √ | √ | √ | √ | √ | 6370576 | FAILED | 0:00:14 | 5 | 1 | |||
OR2X2.cell | √ | √ | √ | X | √ | √ | √ 32 | √ | √ | √ | √ | √ | 10197705 | FAILED | 0:00:14 | 5 | 1 | |||
PADINC.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
PADINOUT.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
PADOUT.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
sutherland1989.cell | √ | X | X | X | √ | √ | X | X | X | X | √ | X | 0 | 4 | Expected to get exactly one top level circuit. Expected to get exactly one top level circuit. This cell is currently building... | |||||
TBUFX1.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
TBUFX2.cell | √ | X | X | X | √ | √ | X | X | X | X | X | X | 0 | This cell has been excluded from building | ||||||
vanberkel1991.cell | √ | X | X | X | √ | √ | X | X | X | X | √ | X | 0 | 4 | Expected to get exactly one top level circuit. This cell is currently building... | |||||
XNOR2X1.cell | √ | √ | √ | X | √ | √ | √ 32 | √ | √ | √ | √ | √ | 7710820 | FAILED | 0:00:38 | 5 | 2 | |||
XOR2X1.cell | √ | √ | √ | X | √ | √ | √ 38 | √ | √ | √ | √ | √ | 7710820 | FAILED | 0:00:33 | 5 | 1 |
Filename | Description |
---|---|
√ ../Documents/StdCellLib.pdf | PDF Documentation of the Standard cell library |
√ demoboard.mag | Demoboard: |
√ library.gds | GDS-II file with masks for all cells, can be viewed with KLayout |
√ libresilicon.lef | Library Exchange Format (LEF) File with all cells |
√ libresilicon.lib | LIBERTY File with Characterization of all cells, can be viewed with libertyviz |
√ libresilicon.sp | SPICE netlist with all cells |