Submodule: user_proj_example

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[INFO]: ___ ____ ___ ____ _ ____ ____ ___ / \ | \ / _]| \ | | / || \ / _] | || o ) [_ | _ || | | o || _ | / [_ | O || _/ _]| | || |___ | || | || _] | || | | [_ | | || || _ || | || [_ \___/ |__| |_____||__|__||_____||__|__||__|__||_____|

[INFO]: Version: openram_tc_1kb-alpha-1-444-g22caadd

[INFO]: Running non-interactively

[INFO]: Using design configuration at /project/openlane/user_proj_example/config.tcl

[INFO]: Sourcing Configurations from /project/openlane/user_proj_example/config.tcl

[INFO]: PDKs root directory: /media/philipp/Daten/skywater/open_pdks/sky130/sky130A

[INFO]: PDK: sky130A

[INFO]: Standard Cell Library: sky130_fd_sc_hd

[INFO]: Sourcing Configurations from /project/openlane/user_proj_example/config.tcl

[WARNING]: CELL_PAD_EXECLUDE is now deprecated; use CELL_PAD_EXCLUDE instead.

[INFO]: Current run directory is /project/openlane/user_proj_example/runs/user_proj_example

[WARNING]: Removing exisiting run /project/openlane/user_proj_example/runs/user_proj_example

[INFO]: Preparing LEF Files

mergeLef.py : Merging LEFs sky130_fd_sc_hd.lef: SITEs matched found: 0 sky130_fd_sc_hd.lef: MACROs matched found: 437 mergeLef.py : Merging LEFs complete mergeLef.py : Merging LEFs INVX4.lef: SITEs matched found: 0 INVX4.lef: MACROs matched found: 1 NOR2X1.lef: SITEs matched found: 0 NOR2X1.lef: MACROs matched found: 1 AOI21X1.lef: SITEs matched found: 0 AOI21X1.lef: MACROs matched found: 1 BUFX2.lef: SITEs matched found: 0 BUFX2.lef: MACROs matched found: 1 OR2X1.lef: SITEs matched found: 0 OR2X1.lef: MACROs matched found: 1 INVX2.lef: SITEs matched found: 0 INVX2.lef: MACROs matched found: 1 AND2X2.lef: SITEs matched found: 0 AND2X2.lef: MACROs matched found: 1 OR2X2.lef: SITEs matched found: 0 OR2X2.lef: MACROs matched found: 1 AND2X1.lef: SITEs matched found: 0 AND2X1.lef: MACROs matched found: 1 INVX1.lef: SITEs matched found: 0 INVX1.lef: MACROs matched found: 1 INV.lef: SITEs matched found: 0 INV.lef: MACROs matched found: 1 mergeLef.py : Merging LEFs complete

[INFO]: Merging the following extra LEFs: /project/openlane/user_proj_example/../../cells/lef/INVX4.lef /project/openlane/user_proj_example/../../cells/lef/NOR2X1.lef /project/openlane/user_proj_example/../../cells/lef/AOI21X1.lef /project/openlane/user_proj_example/../../cells/lef/BUFX2.lef /project/openlane/user_proj_example/../../cells/lef/OR2X1.lef /project/openlane/user_proj_example/../../cells/lef/INVX2.lef /project/openlane/user_proj_example/../../cells/lef/AND2X2.lef /project/openlane/user_proj_example/../../cells/lef/OR2X2.lef /project/openlane/user_proj_example/../../cells/lef/AND2X1.lef /project/openlane/user_proj_example/../../cells/lef/INVX1.lef /project/openlane/user_proj_example/../../cells/lef/INV.lef

[INFO]: Trimming Liberty...

[INFO]: Preparation complete

[INFO]: Running Synthesis...

Reading /media/philipp/Daten/skywater/open_pdks/sky130/sky130A/sky130A/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib as a blackbox /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.9+3621 (git sha1 84e9fa7, gcc 8.3.1 -fPIC -Os) [TCL: yosys -import] Command name collision: found pre-existing command `cd' -> skip. [TCL: yosys -import] Command name collision: found pre-existing command `eval' -> skip. [TCL: yosys -import] Command name collision: found pre-existing command `exec' -> skip. [TCL: yosys -import] Command name collision: found pre-existing command `read' -> skip. [TCL: yosys -import] Command name collision: found pre-existing command `trace' -> skip. 1. Executing Liberty frontend. Imported 428 cell types from liberty file. 2. Executing Liberty frontend.

ERROR: Syntax error in liberty file on line 29.

Unexpected newline.

[ERROR]: during executing: "yosys -c /openLANE_flow/scripts/synth.tcl -l /project/openlane/user_proj_example/runs/user_proj_example/logs/synthesis/yosys.log |& tee >&@stdout"

[ERROR]: Exit code: 1

[ERROR]: Last 10 lines:

child process exited abnormally

[ERROR]: Please check yosys log file

[ERROR]: Dumping to /project/openlane/user_proj_example/runs/user_proj_example/error.log

while executing "try_catch [get_yosys_bin] -c $::env(SYNTH_SCRIPT) -l $::env(yosys_log_file_tag).log |& tee $::env(TERMINAL_OUTPUT)" (procedure "run_yosys" line 22) invoked from within "run_yosys" (procedure "run_synthesis" line 4) invoked from within "run_synthesis" (procedure "run_non_interactive_mode" line 11) invoked from within "run_non_interactive_mode {*}$argv" invoked from within "if { [info exists flags_map(-interactive)] || [info exists flags_map(-it)] } { puts_info "Running interactively" if { [info exists arg_values(-file)..." (file "/openLANE_flow/flow.tcl" line 169) make: *** [Makefile:27: user_proj_example] Fehler 1

Reports:

Submodule: user_proj_example